面向指令Cache周期预取的代码排布方法

在含Cache的处理器中,代码排布和指令预取是减少取指延迟的常用技术.代码排布侧重研究代码执行的空间相对位置,指令预取则关注于代码执行的时间相对关系.片上Trace技术非入侵地获得程序的执行路径及时间信息,将代码执行的时空关系联系起来,因此为排布技术和预取技术的结合使用提供了基础.基于YHFT-DSP平台,利用程序运行的周期行为特性设置预取,利用VLIW结构处理器的空闲单元执行预取指令,提出以增加预取容限为目标的函数级代码排布方法.实验结果表明,该方法能有效预取并减少指令Cache失效.

Code Layout for Phase Prefetch on Instruction Cache

Code layout and instruction prefetch are efficient methods to reduce delays on fetching instructions in processors with instruction cache.To reach this,Code layout adjusts relative space positions of execution codes,while instruction prefetch utilizes relative time relations of execution codes.There are seldom researches on combining them together to get better results by now.On-chip trace is a new debug technique that records the whole program path and time marks non-intrusively with special hardware.It co...