The design of A/D converters using two-range comparators

In this paper, a new architecture for performing analog-to-digital conversion with the throughput of flash conversion, but with some relief from the high power and area requirements, is presented. The key element of this technique is the two-range comparator circuit. This new circuit compares the analog input with more than one reference voltage simultaneously, allowing for a large reduction in the total number of comparator circuits required. Simulation results are presented which show a performance increase of 20% in a converter implemented with the new comparator when compared to a conventional flash converter operated at the same power dissipation level.