|
|||||
|
|
On-chip sampling in CMOS integrated circuits |
|
| Authors: | Delmas-Bendhia S. Caignet F. Sicard E. Roca M. |
| Affiliation: | Dept. of Electr. & Comput. Eng., Nat. Inst. of Appl. Sci., Toulouse; |
| Abstract: | This paper presents a technique for precise crosstalk delay measurement based on on-chip sampling. Results obtained on a test chip fabricated in 0.7-μm CMOS technology exhibit a 100% delay increase in a long coupled line configuration |
| Keywords: | |