| AD9779A的寄存器配置及PLL频带优化 |
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| 引用本文： | 蔡翔,伍彩琴.AD9779A的寄存器配置及PLL频带优化[J].单片机与嵌入式系统应用,2011,11(1):36-39. |
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| 作者姓名： | 蔡翔 伍彩琴 |
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| 作者单位： | 蔡翔,Cai Xiang(长春工业大学,计算机科学与工程学院,长春,130012);伍彩琴,Wu Caiqin(云南民族大学) |
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| 摘 要： | 高速数模转换器(DAC)AD9779A内部集成了PLL、插值滤波器、信号同步控制、增益调节等多种功能,通过配置内部寄存器可以控制、优化DAC的各种功能,满足设计需求.本文详细介绍了AD9779A的内部寄存器配置原理,以及S3C2440与AD9779A的通信设计.最后利用AD9779A寄存器配置对PLL进行频带优化.
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| 关 键 词： | AD9779A 高速数模转换器 SPI S3C2440 |
AD9779A Register Configuration and PLL Band Value Selection |
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| Cai Xiang,Wu Caiqin.AD9779A Register Configuration and PLL Band Value Selection[J].Microcontrollers & Embedded Systems,2011,11(1):36-39. |
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| Authors: | Cai Xiang Wu Caiqin |
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| Affiliation: | 1. College of Computer Science ＆ ＆Engineering, Changchun University of Technology, Changchun 130012,China; 2. Yunnan University of Nationalities) |
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| Abstract: | High-speed digital to-analog converter （DAC） AD9779A integrates many functions such as internal PLL, interpolation filters, signal synchronization, DAC gain adjustment. Users control various AD9779A functions by configuring its internal registers. This paper describes the internal registers configuration of AD9779A and the communication design between S3C2440 and AD9779A. PLL band value selection is achieved through register configuration. |
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| Keywords: | AD9779A SPI S3C2440 |
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