Very Low Voltage MOS Translinear Loops Based on Flipped Voltage Followers |
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Authors: | Antonio J. López-Martín Alfonso Carlosena Jaime Ramirez-Angulo |
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Affiliation: | (1) Department of Electrical and Electronic Engineering, Public University of Navarra, Campus Arrosadía, E-31006 Pamplona, SPAIN |
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Abstract: | A novel technique for operating MOS Translinear loops at very low supply voltages is described, based on the use of Flipped Voltage Followers for biasing the loops. The resulting topologies, suited to standard CMOS processes, can be successfully applied to a varied repertory of low-voltage analog circuits, such as squarers, multipliers, filters, oscillators, and RMS-DC converters. Measurement results for a geometric-mean and a squarer/divider circuit demonstrate on silicon the usefulness of this technique. |
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