An SOI LDMOS/CMOS/BJT technology for integrated power amplifiersused in wireless transceiver applications |
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Authors: | Kumar M Tan Y Sin JKO Cai J |
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Affiliation: | Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol.; |
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Abstract: | This paper describes a SOI LDMOS/CMOS/BJT technology that can be used in portable wireless communication applications. This technology allows the complete integration of the front-end circuits with the baseband circuits for low-cost/low-power/high-volume single-chip transceiver implementation. The LDMOS transistors (0.35 μm channel length, 3.8 μm drift length, 4.5 GHz fT and 21 V breakdown voltage), CMOS transistors (1.5 μm channel length, 0.8/-1.2 V threshold voltage), lateral NPN transistor (18 V BVCBO and h FE of 20), and high Q-factor (up to 6.1 at 900 MHz and 7.2 at 1.8 GHz) on-chip inductors are fabricated. A fully-functional high performance integrated power amplifier for 900 MHz wireless transceiver application is also demonstrated |
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