| RS(31,27)高速编译码器的FPGA实现 |
| |
| 引用本文： | 雷庭庭,李文辉.RS(31,27)高速编译码器的FPGA实现[J].电子质量,2011(5):1-3. |
| |
| 作者姓名： | 雷庭庭 李文辉 |
| |
| 作者单位： | 电子科技大学,四川,成都,611731 |
| |
| 摘 要： | RS码是目前最有效、应用最广泛的差错控制编码方法之一.该文深入研究了RS编解码的原理,对相关算法进行优化.并在FPGA上实现了(31,27)编解码器.由仿真结果验证了该编解码器占用系统资源少,运行时间快,能够满足通信系统上的要求.
|
| 关 键 词： | RS译码 BM算法 Chien搜索 现场可编程门阵列(FPGA) |
Implementation of High-speed Reed-Solomon Coder and Decoder Based on FPGA |
| |
| Lei Ting-ting,Li Wen-hui.Implementation of High-speed Reed-Solomon Coder and Decoder Based on FPGA[J].Electronics Quality,2011(5):1-3. |
| |
| Authors: | Lei Ting-ting Li Wen-hui |
| |
| Affiliation: | (University of Electronic Science and Technology of China,Sichuan Chengdu 611731) |
| |
| Abstract: | RS code is one of the most effective and widely used method of error control coding.This article studies the RS encoding and decoding principles deeply,and optimites the related algorithm.At last,we implemented the RS(31,27) codec on the FPGA.The simulation results show the codec takes less system resources,and run in less time,so it can meet the requirements of communication systems. |
| |
| Keywords: | RS decoding BM algorithm Chien search Field-programmable Gate Array |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
|
