Accurate and Simplified Prediction of AVF for Delay and Energy Efficient Cache Design |
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Authors: | An-Guo Ma Yu Cheng Zuo-Cheng Xing |
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Affiliation: | (1) School of Computer Science, National University of Defense Technology, Changsha, 410073, China |
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Abstract: | With continuous technology scaling, on-chip structures are becoming more and more susceptible to soft errors. Architectural
vulnerability factor (AVF) has been introduced to quantify the architectural vulnerability of on-chip structures to soft errors.
Recent studies have found that designing soft error protection techniques with the awareness of AVF is greatly helpful to
achieve a tradeoff between performance and reliability for several structures (i.e., issue queue, reorder buffer). Cache is
one of the most susceptible components to soft errors and is commonly protected with error correcting codes (ECC). However,
protecting caches closer to the processor (i.e., L1 data cache (L1D)) using ECC could result in high overhead. Protecting
caches without accurate knowledge of the vulnerability characteristics may lead to over-protection. Therefore, designing AVF-aware
ECC is attractive for designers to balance among performance, power and reliability for cache, especially at early design
stage. In this paper, we improve the methodology of cache AVF computation and develop a new AVF estimation framework, soft
error reliability analysis based on SimpleScalar. Then we characterize dynamic vulnerability behavior of L1D and detect the
correlations between L1D AVF and various performance metrics. We propose to employ Bayesian additive regression trees to accurately
model the variation of L1D AVF and to quantitatively explain the important effects of several key performance metrics on L1D
AVF. Then, we employ bump hunting technique to reduce the complexity of L1D AVF prediction and extract some simple selecting
rules based on several key performance metrics, thus enabling a simplified and fast estimation of L1D AVF. Based on the simplified
and fast estimation of L1D AVF, intervals of high L1D AVF can be identified online, enabling us to develop the AVF-aware ECC
technique to reduce the overhead of ECC. Experimental results show that compared with traditional ECC technique which provides
complete ECC protection throughout the entire lifetime of a program, AVF-aware ECC technique reduces the L1D access latency
by 35% and saves power consumption by 14% for SPEC2K benchmarks averagely. |
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