Design, modeling, and characterization of monolithically integratedInP-based (1.55 μm) high-speed (24 Gb/s) p-i-n/HBT front-endphotoreceivers |
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Authors: | Kyounghoon Yang Gutierrez-Aitken AL Xiangkun Zhang Haddad GI Bhattacharya P |
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Affiliation: | Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI; |
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Abstract: | High-speed, long-wavelength InAlAs/InGaAs OEIC photoreceivers based on a p-i-n/HBT shared layer integration scheme have been designed, fabricated and characterized. The p-i-n photodiodes, formed with the 6000 Å-thick InGaAs precollector layer of the HBT as the absorbing layer, exhibited a responsivity of ~0.4 A/W and a -3 dB optical bandwidth larger than 20 GHz at λ=1.55 μm. The fabricated three-stage transimpedance amplifier with a feedback resistor of 550 Ω demonstrated a transimpedance gain of 46 dBΩ and a -3 dB bandwidth of 20 GHz. The monolithically integrated photoreceiver with a 83 μm p-i-n photodiode consumed a small dc power of 35 mW and demonstrated a measured -3 dB optical bandwidth of 19.5 GHz, which is the highest reported to date for an InAlAs/InGaAs integrated front-end photoreceiver. The OEIC photoreceiver also has a measured input optical dynamic range of 20 dB. The performance of individual devices and integrated circuits was also investigated through detailed CAD-based analysis and characterization. Transient simulations, based on a HSPICE circuit model and previous measurements of eye diagrams for a NRZ 231-1 pseudorandom binary sequence (PRBS), show that the OEIC photoreceiver is capable of operation up to 24 Gb/s |
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