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Single-pair bulk-driven CMOS input stage: A compact low-voltage analog cell for scaled technologies
Authors:Juan M Carrillo [Author Vitae]  Guido Torelli [Author Vitae] [Author Vitae]  José M Valverde [Author Vitae] [Author Vitae]
Affiliation:a Department of Electronics, University of Extremadura, Avda. Elvas s/n, 06071 Badajoz, Spain
b Department of Electronics, University of Pavia, Via Ferrata 1, 27100 Pavia, Italy
Abstract:Bulk-driven MOS transistors lead to a compact low-voltage/low-power input stage implementation. This paper illustrates the rail-to-rail capability of a single-pair bulk-driven CMOS input stage operated from an extremely low supply voltage. A composite input stage is also introduced to point out some limitations inherent in multiple-pair input stages and carry out performance comparison, based on experimental data obtained in standard 0.35 μm CMOS technology. The performance achieved by the single-pair bulk-driven input stage can be readily extended to a nanoscale process, as lower supply voltages in scaled technologies are expected. Measurements demonstrate the rail-to-rail suitability of the single-pair input stage and show intrinsic advantages of this approach in some amplifier features, such as linearity and common-mode rejection ratio, as compared to the case of the composite solution.
Keywords:Bulk-driven MOS transistors  CMOS analog integrated circuits  Low-voltage  Operational amplifiers  Rail-to-rail input stages
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