Thermal distribution calculations for block level placement in embedded systems |
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Authors: | Rajendra M Patrikar K Murali Li Er Ping |
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Affiliation: | a Institute of High Performance Computing (IHPC), Computational Electromagnetics and Electronics Division, 1 Science Park Road, #01-01, The Capricorn Science Park II, Singapore 117528, Singapore;b Department of Ocean Engineering, Indian Institute of Technology Madras, Chennai 600036, India |
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Abstract: | Reliability is a very important concern for the embedded systems. Thermal distribution has become an important reliability concern for today’s integrated circuits and these circuits are being used increasingly in embedded systems. In traditional design flows, the temperature of the chip is assumed to be uniform across the substrate. However, non-uniform thermal distribution can be a major source of inaccuracy in delay and clock skew computations, and can have an impact on elctromigration reliability and self-heating effects for today’s very deep submicron technology. Hence, it has become necessary to obtain design with uniform temperature distribution to ensure minimum temperature gradient and avoid hot spots across the chip area. This will minimise reliability problems during the operation of the chip. The uniform temperature distribution can be achieved by appropriate placement of circuit blocks during the physical design. In this paper, thermal distribution of single chip embedded system on silicon is discussed. The thermal distribution calculations require evaluation of switching activity factor of circuit blocks. This factor is determined by computing activities of the blocks based on the application software of embedded system. |
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