RSA密码算法的可重构设计与实现

本文对RSA密码算法的实现和可重构性进行了分析，在对模幂模块和模乘模块进行了可重构设计的基础上，提出一种可重构RSA硬件架构，使其能够适配256bit、512bit、1024bit、2048bit四种不同密钥长度的应用。RSA可重构设计在FPGA上进行了实现与测试，结果表明，工作在200MHz时钟时，2048bit密钥长度RSA在最坏情况下数据吞吐量可达46kb／s，能够满足高性能的信息安全系统对RSA算法的加密速度要求。

Reconfigurable Design and Implementation of RSA Algorithm

In this paper, the implementation and reconfigurable feature of RSA cryptographic algorithm are analyzed. On the basis of the Reconfigurable design of the Modular Multiplication and Modular Exponentiation, we propose the reconfigurable RSA hardware architecture, which is able to fit 256bit, 512bit, 1024bit, 2048bit four applications of different key length. The RSA reconfigurable design and testing were carried out to achieve results, which showthat in the worst case, 2048bit RSA get the data throughput ach...