Low-voltage transconductor with high linearity and large bandwidth

A linear tunable CMOS transconductor is proposed which uses a new low-voltage supercascode transistor to provide a high output resistance. Using a standard 0.8 /spl mu/m CMOS technology, simulation results are provided that show the operation of the proposed transconductor with a 1.2 V peak-to-peak differential input signal and 1.5 V supply voltage. The proposed transconductor features a high linearity and more than 100 MHz bandwidth.