| 局部动态重构在SOPC中的应用 |
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| 引用本文： | 黄俊,朱明程.局部动态重构在SOPC中的应用[J].深圳大学学报(理工版),2006,23(4):351-355. |
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| 作者姓名： | 黄俊 朱明程 |
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| 作者单位： | 深圳大学信息工程学院,深圳,518060 |
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| 摘 要： | 提出一种在Xilinx平台上基于模块的局部重构设计方法,并将其应用在片上可编程系统SOPC中.在现有Xilinx软硬件平台上,以XC2VP40内嵌的PowerPC处理器内核为基础,通过XC2VP40内部配置访问通道（ICAP）,对挂在OPB总路线上的DCT IP模块和IDCT IP模块进行动态重构.该方法实现了局部重构技术在SOPC中的应用,及FPGA硬件资源的高速时分复用,降低了系统功耗,提高了系统硬件资源的利用率.
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| 关 键 词： | 动态重构 现场可编程逻辑阵列 OPB总线 局部重构 |
| 文章编号： | 1000-2618(2006)04-0351-05 |
| 收稿时间： | 2005-07-12 |
| 修稿时间： | 2006-06-10 |
The application of partial reconfiguration in SOPC |
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| HUANG Jun,ZHU Ming-cheng.The application of partial reconfiguration in SOPC[J].Journal of Shenzhen University(Science &engineering),2006,23(4):351-355. |
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| Authors: | HUANG Jun ZHU Ming-cheng |
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| Affiliation: | College of Information Engineering Shenzhen University Shenzhen 518060 P. R. China |
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| Abstract: | An algorithm of module-based partial reconfiguration on Xilinx and its application in system on programmable chip (SOPC) was introduced. On the hardware and software platform of Xilinx,PowerPC embedded in the XC2VP40 dynamically reconfigures DCT IP modular and IDCT IP modular by internal configuration access port (ICAP). DCT IP modular and IDCT IP modular could be connected with on-chip peripheral bus (OPB). So it realizes high-speed time division multiplex on FPGA hard resources,and reduces power dissipation. At the same time,it improves the usage of FPGA hardware resources. |
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| Keywords: | dynamic reconfiguration field programmable gate array on-chip peripheral bus partial reconfiguration |
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