a Philips Semiconductors Crolles R&D, 860 Rue Jean Monnet, 38920, Crolles, France
b STMicroelectronics, 850 Rue Jean Monnet, 38926, Crolles Cedex, France
c CEA-Leti CCMC, 17 Rue des Martyrs, 38054, Grenoble Cedex 9, France
Abstract:
The formation of air gaps by means of a non-conformal chemical vapor deposition (CVD) on patterned wafers was successfully demonstrated using SiOC (K=2.9) as inter-level metal dielectric. This paper presents the results on physical characterization and electrical performance evaluation of integrated SiOC air gaps in a three-metal level Cu/SiOC interconnect module. The influence of the air gaps shape on parasitic coupling capacitance between copper lines was also discussed in accordance with mask design rules and processing steps.