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3D堆叠技术及TSV技术
引用本文:朱健. 3D堆叠技术及TSV技术[J]. 固体电子学研究与进展, 2012, 32(1): 73-77,94
作者姓名:朱健
作者单位:南京电子器件研究所 微波毫米波单片集成和模块电路重点实验室 南京 210016
摘    要:介绍了3D堆叠技术及其发展现状,探讨了W2W(Wafer to wafer)及D2W(Die to wafer)等3D堆叠方案的优缺点,并重点讨论了垂直互连的穿透硅通孔TSV(Through silicon via)互连工艺的关键技术,探讨了先通孔、中通孔及后通孔的工艺流程及特点,介绍了TSV的市场前景和发展路线图。3D堆叠技术及TSV技术已经成为微电子领域研究的热点,是微电子技术及MEMS技术未来发展的必然趋势,也是实现混合集成微系统的关键技术之一。

关 键 词:三维堆叠  硅通孔  三维集成

3D-stack and TSV Technology
ZHU Jian. 3D-stack and TSV Technology[J]. Research & Progress of Solid State Electronics, 2012, 32(1): 73-77,94
Authors:ZHU Jian
Affiliation:ZHU Jian(Science and Technology on Monolithic Integrated Circuits and Modules Laboratory,Nanjing Electronic Devices Institute,Nanjing,210016,CHN)
Abstract:The technologies and developments of 3D-stack and TSV(Through silicon via) are introduced.The advantages and disadvantages of W2W(Wafer to wafer) and D2W(Die to wafer) are discussed.The introduction focuses on the key technology of TSV interconnect process.The process flows and features of via first,via middle and via last are presented.The road map and market value of TSV technology are introduced.3D-stack and TSV have become a hot research field of microelectronics.They are the inevitable trend of microelectronics and MEMS technology and the key technology of hybrid integration microsystem.
Keywords:3D-stack  TSV  3D-integration
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