一种32 Bit SoC软硬件协同验证环境的实现

软硬件协同验证是系统芯片设计的重要组成部分。针对基于32 Bit CPU核的某控制系统芯片的具体要求，提出了一种系统芯片软硬件协同验证策略，构建了一个软硬件协同验证环境。该环境利用处理器内核模型支持内核指令集的特性运行功能测试程序，实现SoC软硬件的同步调试，并能够快速定位软硬件的仿真错误点，有效提高了仿真效率。该SoC软硬件协同验证环境完成了设计目的，并对其他系统芯片设计具有一定的参考价值。

A Collaborative Environment for 32 Bit SoC Verification

The co-verification of hardware and software (HW/SW) is an important part of System-on-Chip (SoC) design. According to the requirement of a SoC design based on 32 bit CPU core,a HW/SW co-verification strategy is presented and a HW/SW co-verification environment has been built. With the CPU model supporting of CPU instruction set, the c language program for test is run in this environment, and the hardware and software of SoC can be synchronously debug. The error in HW/SW co-verification can be quickly and easily traced, and the efficiency has been improved. Based on introducing SoC structure, the implementation of HW/SW co- verification environment are described in detailed. The co-verification environment has achieved the design goals, and has some useful reference for other SoC design.