Simulation of LED based luminaires by using multi-domain compact models of LEDs and compact thermal models of their thermal environment |
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| Affiliation: | 1. Department of Engineering and System Science, National Tsing Hua University, Hsinchu, Taiwan, ROC;2. Powerchip Technology Corp., Hsinchu Science Park, Hsinchu, Taiwan, ROC;3. Institute of Nuclear Energy Research, Taoyuan 32546, Taiwan, ROC;1. China Electronic Product Reliability and Environmental Testing Research Institute (CEPREI), Guangzhou 510610, China;2. School of Electronic and Information Technology, Sun Yat-sen University, Guangzhou 510275, China;1. Dept. of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang 790-784, Republic of Korea;2. SK hynix Inc., Bubal-eub, Ichon-si, Gyeonggi-Do 467-701, Republic of Korea;1. School of Mechanical Engineering, Engineering Campus, Universiti Sains Malaysia, Nibong Tebal, 14300, Penang, Malaysia;2. School of Aerospace Engineering, Engineering Campus, Universiti Sains Malaysia, Nibong Tebal, 14300, Penang, Malaysia;3. Jabil Circuits, 56, Hilir Sungai Kluang 1, Bayan Lepas, 11900, Penang, Malaysia |
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| Abstract: | Fast and accurate prediction of hot lumens of LEDs installed in luminaires is an important step in the design of robust and reliable products. A possible approach to this is to create a multi-domain circuit model of a complete LED chip + package + luminaire system that can be simulated by any Spice-like circuit simulator with electro-thermal capabilities. Many LED chip and LED package models and modeling techniques have been published recently, but compact thermal modeling of luminaires as multi heat-source system was not yet dealt with in the literature. This paper aims to fill this gap be describing a systematic approach for system (luminaire) level analysis aimed at solving the combined thermal, electrical and light output simulation problem consistently by describing a method for creating a compact thermal model of LED luminaries with an approach borrowed from the layout based electro-thermal simulation of analog ICs. The applicability of the described method is demonstrated with a real life example, including the validation of the results with thermal measurements. |
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