An efficient reliability testing method combined with thermal performance monitoring |
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| Affiliation: | 1. Department of Manufacturing and Materials Engineering, University of Campinas, UNICAMP, 13083-860 Campinas, SP, Brazil;2. Federal Institute of Education, Science and Technology of Pará, IFPA, 66093-020 Belém, PA, Brazil;1. Department of Electrophysics, National Chiao Tung University, Hsinchu 300, Taiwan, ROC;2. Department of Mechanical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan, ROC;3. Department of Mechanical Engineering, National Chung Cheng University, Chia-Yi 621, Taiwan, ROC;4. Research Group of Biomedical Image Processing, Shing-Tung Yau Center, National Chiao Tung University, Hsinchu 300, Taiwan, ROC;5. Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan, ROC;6. Material and Design Engineering Division Engineering Center, Siliconware Precision Industries Co., Ltd., Taichung 400, Taiwan, ROC;7. Department of Mechatronic Engineering, National Taiwan Normal University, Taipei City 106, Taiwan, ROC;1. State Key Lab of Electronic Thin Films & Integrated Devices, University of Electronic Science & Technology of China, Chengdu, China;2. Institute of Biomedical Engineering, Chinese Academy of Medical Science and Peking Union Medical College, 300192 Tianjin, China;3. Design center, Avic Beijing Keeven Aviation Instrument CO., LTD, China Aviation Industry Corporation, Beijing, China;1. Department of Materials Engineering, Isfahan University of Technology, Isfahan 84156-83111, Iran;2. Delft University of Technology, EEMCS Faculty, Delft, The Netherlands;1. Department of Electrical Engineering, National Taiwan Normal University, Taiwan;2. Institute of Electronics, National Chiao Tung University, Taiwan |
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| Abstract: | Die attach delamination in power electronic devices is a common failure mode besides bond wire damage. This paper describes the chip and packaging level effects of a newly developed power cycling test on novel mid-power automotive MOSFETs. The introduced method was pilot tested with our new approach, using a recently developed test environment. The idea was to combine the existent guidelines of the most relevant semiconductor characterization and cycling standards while saving time and resources during testing. Thermal transient measurements during the actively mimicked temperature cycling reliability test were evaluated along with K-factor calibration to identify different failure modes. This approach allows distinguishing between electrical and thermal related structural failure modes. The major target was to test the reliability of a new thermal interface material which was used in the MOSFETs under test. We found that the new material was able to withstand the 150 °C temperature amplitude beyond 100,000 cycles without critical failures. The changes of the thermal performance of the complete assembly were tracked from the pre-stress state until a sample reached critical condition. |
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