Programmable vision processor/controller for flexibleimplementation of current and future image compression standards

The vision processor (VP) and vision controller (VC), two integrated products dedicated to video compression, are discussed. The chips implement the P×64, JPEG, and MPEG image compression standards. The VP forms the heart of the image compression system. It performs discrete cosine transform (DCT), quantization, and motion estimation, as well as inverse DCT, and inverse quantization. The highly parallel and microcode-based processor performs all of the JPEG, MPEG, and P×64 algorithms. The VC smart microcontroller controls the compression process and provides the interface to the host system. It captures pixels from a video source, performs video preprocessing, supervises pixel compression by the VP, performs Huffman encoding, and passes the compressed data to the host over a buffered interface. It takes compressed data from the host, performs coder decoding, supervises decompression via the VP, performs postprocessing, and generates digital pixel output for a video destination such as a monitor