| 阈值电压对超深亚微米SRAM存储单元SNM的影响 |
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| 引用本文： | 李文宏,章倩苓. 阈值电压对超深亚微米SRAM存储单元SNM的影响[J]. 固体电子学研究与进展, 2002, 22(3): 300-304 |
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| 作者姓名： | 李文宏 章倩苓 |
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| 作者单位： | 复旦大学专用集成电路与系统国家重点实验室,上海,200433 |
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| 摘 要： | 采用基于物理模型的 α指数 MOSFET模型 ,对超深亚微米 (VDSM:Very Deep Submicron) SRAM存储单元的静态噪声容限 (SNM:Static Noise Margin)进行了解析分析 ,分析中考虑了随机工艺涨落造成的VDSM SRAM存储单元阈值失配对 SNM的影响 ,结果与 HSPICE仿真相符 ;文中同时分析了栅宽与 SNM的关系 ,其结论与实验结果一致 ,并给出了 VDSM SRAM存储单元设计中应注意的问题
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| 关 键 词： | 超深亚微米 静态随机存储器 静态噪声容限 |
| 文章编号： | 1000-3819(2002)03-300-05 |
| 修稿时间： | 2001-10-08 |
Impact of Threshold Voltage on VDSM SRAM Memory Cell SNM |
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| LI Wenghong ZHANG Qianling. Impact of Threshold Voltage on VDSM SRAM Memory Cell SNM[J]. Research & Progress of Solid State Electronics, 2002, 22(3): 300-304 |
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| Authors: | LI Wenghong ZHANG Qianling |
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| Abstract: | The analytical Static Noise Margin (SNM) model for Very Deep Submicron (VDSM) SRAM memory cell is developed, which is based on physical α power MOSFET model. The effect of threshold voltage mismatch on SNM is analyzed, which agrees with HSPICE simulation. Meanwhile the relation of SNM and the gate width is also analyzed, which is consistent with the experiment. The design rules of VDSM SRAM memory cell are given. |
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| Keywords: | VDSM SRAM SNM |
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