| IIR数字滤波器的FPGA实现 |
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| 引用本文： | 朱幼莲 陶为戈. IIR数字滤波器的FPGA实现[J]. 电气电子教学学报, 2007, 29(2): 52-54,58 |
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| 作者姓名： | 朱幼莲 陶为戈 |
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| 作者单位： | 江苏技术师范学院电信学院,江苏常州213001 |
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| 摘 要： | 本文介绍了IIR滤波器的FPGA实现方法，给出了IIR数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法，并用VHDL和FPGA器件实现了IIR数字滤波。结果表明，这种实现方法扩展性好，灵活性强，速度快，专用资源少，在工程实际中有较好的应用前景。
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| 关 键 词： | 数字滤波 可编程逻辑器件 硬件描述语言 |
| 文章编号： | 1008-0686（2007）02-0052-04 |
| 收稿时间： | 2006-12-04 |
| 修稿时间： | 2006-12-042006-12-29 |
Implementation of IIR Digital Filter Based on FPGA |
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| ZHU You-lian, TAO Wei-ge. Implementation of IIR Digital Filter Based on FPGA[J]. Journal of Electrical & Electronic Engineering Education, 2007, 29(2): 52-54,58 |
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| Authors: | ZHU You-lian TAO Wei-ge |
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| Affiliation: | College of Electronic Information Engineering, J iang su Teachers University of Technology, Changzhou 213001, China |
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| Abstract: | The realization method of a infinite impulse response(IIR) digital filter based on FPGA is introduced.This paper proposes four blocks of IIR,which are clock control,time delay,multiply and addition,implemented IIR filter with VHDL and FPGA device.The results show that the method has a better application prospect,good expansibility,strong flexibility and high speed. Thus the method has the better application prospect in engineering. |
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| Keywords: | digital filter programmable logic device VHDL |
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