Impacts of gate electrode materials on threshold voltage (V/sub th/) instability in nMOS HfO/sub 2/ gate stacks under DC and AC stressing |
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Authors: | Xuguang Wang Peterson J Majhi P Gardner MI Dim-Lee Kwong |
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Affiliation: | Dept. of Electr. & Comput. Eng., Univ. of Texas, Austin, TX, USA; |
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Abstract: | Ultrathin nMOSFET hafnium oxide (HfO/sub 2/) gate stacks with TiN metal gate and poly-Si gate electrodes are compared to study the impact of the gate electrode on long term threshold instability reliability for both dc and ac stress conditions. The poly-Si/high-/spl kappa/ interface exhibits more traps due to interfacial reaction than the TiN/high-/spl kappa/ interface, resulting in significantly worse dc V/sub th/ instability. However, the V/sub th/ instability difference between these two stacks decreases and eventually diminishes as ac stress frequency increases, which suggests the top interface plays a minor role in charge trapping at high operating frequency. In addition, ac stress induced interface states (Nit) can be effectively recovered, resulting in negligible G/sub m/ degradation. |
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