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An Algebraic Approach to Formal Verification of Microprocessors |
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| Authors: | Kanji Hirabayashi |
| Affiliation: | (1) Toshiba Techno Center Inc., Hamamatsucho 1-18-16, Tokyo, 105-0013, Japan |
| Abstract: | In this letter we report the formal verification of microprocessors. After we describe algebraically a bit-sliced microprocessor at both function and logic levels, we apply the symbolic manipulation of Mathematica. |
| Keywords: | formal verification microprocessor |
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