首页 | 本学科首页   官方微博 | 高级检索  
     

基于高性能安全存储芯片的SATA通路验证
引用本文:常琳琳,于哲,周舜民,韩林. 基于高性能安全存储芯片的SATA通路验证[J]. 计算机系统应用, 2023, 32(5): 338-343
作者姓名:常琳琳  于哲  周舜民  韩林
作者单位:中原工学院 前沿信息技术研究院, 郑州 450007;国家超级计算郑州中心, 郑州 450001
摘    要:本文基于UVM验证方法学对自研高性能安全存储SoC芯片系统中SATA通路进行验证,文中对高性能安全存储SoC芯片架构及SATA通路系统工作原理进行说明,以SATA DMA数据传输方式为例介绍了SATA协议链路通信建立及数据传输过程.搭建UVM系统验证平台,文中对SATA协议进行分析,设计规划系统层面测试用例,编写加载至系统中运行的C固件测试程序,实现对系统应用层面关注的PIO、DMA、NCQ等SATA命令方式数据传输通路的验证.结合具体波形分析,结果表明, SATA通路相关集成设计是合理、满足芯片对SATA数据通路应用需求的,实现了对高性能安全存储SoC芯片系统SATA通路的验证.

关 键 词:UVM  SoC  SATA数据传输协议  SATA通路  C固件
收稿时间:2022-09-23
修稿时间:2022-10-21

SATA Pathway Verification Based on High-performance Secure Memory Chip
CHANG Lin-Lin,YU Zhe,ZHOU Shun-Min,HAN Lin. SATA Pathway Verification Based on High-performance Secure Memory Chip[J]. Computer Systems& Applications, 2023, 32(5): 338-343
Authors:CHANG Lin-Lin  YU Zhe  ZHOU Shun-Min  HAN Lin
Affiliation:The Frontier Information Technology Research Institute, Zhongyuan University of Technology, Zhengzhou 450007, China;National Supercomputing Center in Zhengzhou, Zhengzhou 450001, China
Abstract:This study uses the UVM verification methodology to verify the serial advanced technology attachment (SATA) pathway in the self-developed high-performance secure memory system on chip (SoC) chip system. In this study, the architecture of a high-performance secure memory SoC chip and the working principle of the SATA pathway system are explained. Taking the SATA direct memory access (DMA) data transmission mode as an example, this study introduces the establishment of SATA protocol link communication and the process of data transmission. In addition, this study builds the UVM system verification platform, analyzes the SATA protocol, designs and plans the test cases at the system level, and writes the C firmware test program loaded into the system to run. In this way, programmed input/output (PIO), DMA, native command queuing (NCQ), and other data transmission pathways under SATA commands concerned at the system application level are verified. Together with the specific waveform analysis, the results show that the SATA pathway-related integration design is reasonable and meets the application requirements of the chip for the SATA data pathway, which verifies the SATA pathway for the high-performance secure memory SoC chip system.
Keywords:universal verification methodology (UVM)  system on chip (SoC)  SATA data transfer protocol  serial advanced technology attachment (SATA) pathway  C firmware
点击此处可从《计算机系统应用》浏览原始摘要信息
点击此处可从《计算机系统应用》下载全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号