High-speed dynamic reference voltage (DRV) CMOS/ECL interfacecircuits |
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| Authors: | Gu R.X. Elmasry M.I. |
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| Affiliation: | Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont.; |
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| Abstract: | This paper introduces a circuit technique to increase the operating speed of CMOS/ECL interface circuits. The technique is based on shifting the reference voltage dynamically to follow the ECL input signal. HSPICE simulation results based on a 0.8-μm BiCMOS technology show the advantages of DRV CMOS/ECL in terms of speed and noise margins. An analytical delay model which fits HSPICE simulation results is addressed. The error between the model and the circuit simulator is within 4% |
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