一种流水线型高速过采样∑-△调制器 |
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引用本文: | 李红,周晓方,闵昊.一种流水线型高速过采样∑-△调制器[J].微电子学,1997(4). |
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作者姓名: | 李红 周晓方 闵昊 |
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摘 要: | 提出了一种采用流水线采样输入的开关电容型∑-△调制器的实现方法,该方法充分利用了时钟的每一时刻。用此方法设计的∑-△调制器来样速率可提高30%。实验表明,这种方法是完全可取的。
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关 键 词: | 模拟集成电路,A/D转换器,调制器,流水线采样 |
A Pipelined High Speed Oversampled Sigma-Delta Modulator |
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Abstract: | A technique to implement a switched capacitor sigma-delta modulator by using pipelined sampling input is described , which makes full use of every moment of the clock. The sampling rate of the device designed with this method can be increased by 30%. Results from simulation show the proposed technique is preferable. |
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Keywords: | Analog IC Analog-to-digital converter Modulator Pipelined sampling EEACC 1265H 1250 |
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