Exploiting Gate Leakage in Deep-Submicrometer CMOS for Input Offset Adaptation |
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Authors: | Hafliger P. Berge H.K.O. |
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Affiliation: | Dept. of Inf., Oslo Univ.; |
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Abstract: | Gate leakage that occurs in deep-submicrometer CMOS might be a convenient new way of implementing highly resistive elements with minimal area consumption. We present an adaptive device that exploits gate leakage in the 90-nm STM CMOS process for offset cancellation at its input. This is achieved by a high-pass-filtering input stage with a very low cutoff due to a time constant of approximately 130 ms. In this filter, three 0.1times0.22 mum2 gate-oxide structures are used to achieve the equivalent of a 6.5-GOmega resistance |
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