| 一种基于FPGA的PXA270外设时序转换接口设计 |
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| 引用本文： | 王青元,吴培栋,李云峰. 一种基于FPGA的PXA270外设时序转换接口设计[J]. 电子设计工程, 2009, 17(8) |
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| 作者姓名： | 王青元 吴培栋 李云峰 |
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| 作者单位： | 西南交通大学电气工程学院,四川,成都,610031;西南交通大学电气工程学院,四川,成都,610031;西南交通大学电气工程学院,四川,成都,610031 |
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| 摘 要： | 为解决ARCNET协议器件COM20020应用于列车通信网络时,与中央控制单元(CCU)处理器PXA270之间时序不匹配的问题.提出一种基于FPGA的PXA270外设时序转换接口设计方案.此外,还在FPGA中增加存储器直接访问(DMA)功能.以减轻PXA270的负担.测试结果表明,该方案成功解决时序匹配问题,增强网络的响应能力.关
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| 关 键 词： | FPGA PXA270 时序转换 COM20020 |
Design of a timing conversion interface between PXA270 and peripherals based on FPGA |
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| WANG Qing-yuan,WU Pei-dong,LI Yun-feng. Design of a timing conversion interface between PXA270 and peripherals based on FPGA[J]. Electronic Design Engineering, 2009, 17(8) |
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| Authors: | WANG Qing-yuan WU Pei-dong LI Yun-feng |
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| Abstract: | A design of timing conversion interlace between PXA270 and peripherals based on FPGA is introduced,in order to solve the problem of timing matching when the ARCNET protocol chip COM20020 is connected to the processor of central control unit(CCU)PXA270 in train communication network. And an additional moduleDMA is designed in the FPGA to ease PXA270's burden.The test result of the whole network shows that this solution solves the timing matching problem and enhances response capability of the network. |
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| Keywords: | FPGA PXA270 timing conversion COM20020 |
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