| 基于可编程逻辑器件的I2C从机设计 |
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| 引用本文： | 应成. 基于可编程逻辑器件的I2C从机设计[J]. 低压电器, 2007, 0(23): 34-36 |
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| 作者姓名： | 应成 |
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| 作者单位： | 上海电器科学研究所(集团)有限公司,上海,200063 |
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| 基金项目： | 上海市引进技术吸收与创新计划 |
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| 摘 要： | 介绍了一种基于可编程逻辑器件的I2C从机设计.以可编程逻辑器件MarchXO 256为核心,用VHDL编写了I2C进程,重点设计了读写状态机,并在输入后端加入D触发器,以提高从机在工业环境中的抗干扰能力.该设计提高了主机扩展I/O口的灵活性和可配置性.
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| 关 键 词： | 复杂可编程逻辑器件 I2C总线 状态机 抗干扰 |
| 文章编号： | 1001-5531(2007)23-0034-03 |
| 修稿时间： | 2007-06-05 |
Design of I2C Slave Based on Programmable Logic Device |
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| YING Cheng. Design of I2C Slave Based on Programmable Logic Device[J]. Low Voltage Apparatus, 2007, 0(23): 34-36 |
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| Authors: | YING Cheng |
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| Abstract: | A design of I2C slave based on programmable logic device was introduced.Taking programmable logic device MachXO 256 as core, I2C course was programmed by VHDL. The read/write state machine was designed emphatically. And D trigger was added to the back-end of input to improve anti-jamming ability of slave under industrial condition. |
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| Keywords: | complex programmable logic device(CPLD) I2C bus state machine anti-jamming |
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