| 一种低功耗异步FIFO存储器的设计 |
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| 引用本文： | 张海勇,叶显阳,皮代军,秦水介. 一种低功耗异步FIFO存储器的设计[J]. 现代电子技术, 2008, 31(18) |
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| 作者姓名： | 张海勇 叶显阳 皮代军 秦水介 |
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| 作者单位： | 贵州省光电子技术及应用重点实验室,贵州,贵阳,550025 |
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| 基金项目： | 贵州省自然科学基金，贵州省自然科学基金，教育部高等学校优秀青年教师教学科研奖励计划，贵州省国际科技合作项目，贵州省优秀青年科技人才培养计划基金，贵州大学校研究生创新基金 |
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| 摘 要： | 针对传统异步FIFO功耗较高的缺点,设计一种低功耗异步FIFO存储器。通过采用对异步读写指针的前两个状态位直接比较的方法,减少格雷码向二进制转换的电路,并增加门控时钟电路,从而大大降低了存储器的动态功耗。通过软件QuartusⅡ7.2对其进行功耗估算,功耗降低了8%。用ModelSim SE 6.1b进行仿真,验证了设计功能的正确性。
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| 关 键 词： | 异步FIFO 格雷码 门控时钟 动态功耗 |
Design of a Low Power Asynchronous FIFO Memory |
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| ZHANG Haiyong,YE Xianyang,PI Daijun,QIN Shuijie. Design of a Low Power Asynchronous FIFO Memory[J]. Modern Electronic Technique, 2008, 31(18) |
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| Authors: | ZHANG Haiyong YE Xianyang PI Daijun QIN Shuijie |
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| Abstract: | Due to the high power of the traditional asynchronous FIFO.A low power-consumption asynchronous FIFO memory is designed.The dynamic power consuming of this FIFO memory is reduced greatly by directly comparing the two precedent state bytes of the asynchronous read-write pointer,dropping a conversion circuit of the gray code to the binary,and adding a clock-gating circuit.The power consumption of the memory is estimated at about 8% by using the soft Quartus II 7.2.The simulation results indicate the well function through the Modelsim SE 6.1b. |
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| Keywords: | asynchronous FIFO Gray code clock-gating circuit dynamic power consuming |
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