A 2.7-V GSM RF transceiver IC |
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Authors: | Yamawaki T. Kokubo M. Irie K. Matsui H. Hori K. Endou T. Hagisawa H. Furuya T. Shimizu Y. Katagishi M. Hildersley J.R. |
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Affiliation: | Central Res. Lab., Hitachi Ltd., Kokubunji; |
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Abstract: | A 2.7-V RF transceiver IC is intended for small, low-cost global system for mobile communications (GSM) handsets. This chip includes a quadrature modulator (QMOD) and an offset phase locked loop (OPLL) in the transmit path and a dual IF receiver that consists of a low noise amplifier (LNA) with an active-bias circuit, two Gilbert-cell mixers, a programmable gain linear amplifier (PGA), and a quadrature demodulator (QDEM). The IC also contains frequency dividers with a very high frequency voltage controlled oscillator (VHF-VCO) to simplify the receiver design. The system evaluation results are the phase error of 2.7° r.m.s. and the noise transmitted in the GSM receiving band of -163 dBc/Hz for transmitters and the reference sensitivity of -105 dBm for receivers. Power-control functions are provided for independent transmit and receive operation. The IC is implemented by using bipolar technology with fT=15 GHz, r'bb=150 Ω, and 0.6-μm features |
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