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一种高速高宽带主从式采样保持电路
引用本文:丁浩,王建业,刘伟,熊永忠. 一种高速高宽带主从式采样保持电路[J]. 西安电子科技大学学报(自然科学版), 2018, 45(4): 123-128. DOI: 10.3969/j.issn.1001-2400.2018.04.022
作者姓名:丁浩  王建业  刘伟  熊永忠
作者单位:(1. 空军工程大学 研究生院,陕西 西安 710000;2. 成都聚利中宇科技有限公司,四川 成都 610200)
摘    要:基于0.13μm SiGe BiCMOS工艺设计并实现了一种新型高速高宽带主从式采样保持电路.该电路采用PMOS源极跟随器作输入级实现了直流耦合,使得低频、低偏置电压信号也可以被正常采样.采用Cherry-Hooper放大器将带宽提升至18GHz.通过主从式采样结构和交叉耦合电容消除了信号馈通,使用互补三极管抵消了时钟馈通的影响,将无杂散动态范围控制在33~38dB.对比结果表明,这种设计方案在带宽方面具有较大的优势,并且具有较高的采样率.

关 键 词:高速高宽带  主从式采样  采样保持电路  信号馈通  时钟馈通  模数转换器  
收稿时间:2017-11-08

High-speed high-broadband master-slave sampling and hold circuit
DING Hao,WANG Jianye,LIU Wei,XIONG Yongzhong. High-speed high-broadband master-slave sampling and hold circuit[J]. Journal of Xidian University, 2018, 45(4): 123-128. DOI: 10.3969/j.issn.1001-2400.2018.04.022
Authors:DING Hao  WANG Jianye  LIU Wei  XIONG Yongzhong
Affiliation:(1. School of Graduate, Air Force Engineering Univ., Xian 710000, China;2. Chengdu Chipzone Tech Co., Ltd., Chengdu 610200, China)
Abstract:This paper presents a new-style high-speed broadband master-slave sampling and hold circuit based on the 0.13μm SiGe BiCMOS. In order to realize DC coupling and sample the low-frequency low-offset-voltage signal, the PMOS source follower is used in the input stage. The Cherry-Hooper structure is used to expand the bandwidth up to 18GHz. Signal feedthrough is cancelled by the master-slave sampling structure and cross-coupled capacitors. Clock feedthrough is attenuated by complementary bipolar transistors. The spurious free dynamic range is 33~38dB. Comparison results show that the proposed circuit has a big advantage in bandwidth and is able to sample at a high sampling rate.
Keywords:high-speed and high-broadband   master-slave sampling structure   sample-and-hold circuit   signal feedthrough   clock feedthrough   analog-to-digital converter  
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