0.13-/spl mu/m low-/spl kappa/-Cu CMOS logic-based technology for 2.1-gb high data rate read-channel |
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Authors: | Jyh Chyurn Guo Lien WY Tsai TL Chen SM Wu CM |
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Affiliation: | Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan; |
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Abstract: | High-performance analog/digital elements have been successfully fabricated by a 0.13-/spl mu/m low-/spl kappa/-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects. |
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