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基于ARM的半导体分立器件测试主机系统总线
引用本文:乔爱民,戴敏,史金飞.基于ARM的半导体分立器件测试主机系统总线[J].自动化与仪表,2007,22(1):74-78.
作者姓名:乔爱民  戴敏  史金飞
作者单位:1. 蚌埠学院,机械与电子工程系,蚌埠,233000
2. 东南大学,机械工程系,南京,210096
摘    要:半导体分立器件测试系统是提升半导体分立器件测试和封装企业自动化水平的一种重要的检测设备。介绍一种基于ARM微处理器S3C44B0的半导体分立器件测试系统测试主机系统总线的生成方法。在分析了测试系统的组成、S3C44B0的特点及测试主机系统总线性能要求后,完成了测试主机系统总线的生成。

关 键 词:测试主机系统总线  半导体分立器件测试系统
文章编号:1001-9944(2007)01-0074-05
修稿时间:2006-05-082006-11-03

Testing Host Bus of Discrete Semiconductors Based on ARM
QIAO Ai-min,DAI Min,SHI Jin-fei.Testing Host Bus of Discrete Semiconductors Based on ARM[J].Automation and Instrumentation,2007,22(1):74-78.
Authors:QIAO Ai-min  DAI Min  SHI Jin-fei
Affiliation:1.Department of Mechanical and Electronic Engineering,Bengbu College, Bengbu 233000,China;2.Department of Mechanical Engineering,Southeast University,Nanjing 210096,China
Abstract:The discrete semiconductor testing system is significant equipment for the semiconductor enterprises of packing and testing.It can largely enhance these enterprises' productivity.The method about the creation of testing host bus for a kind of discrete semiconductor testing system which is based on the ARM is introduced in this article.After analysing the structure of the testing system and S3C44B0 and requirement of the testing host bus,the testing host bus is designed.
Keywords:ARM  S3C44BO
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