| 基于System Generator的插值滤波器的FPGA实现 |
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| 引用本文： | 罗婷婷,王厚军,曾浩.基于System Generator的插值滤波器的FPGA实现[J].电子质量,2009(10):21-23. |
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| 作者姓名： | 罗婷婷 王厚军 曾浩 |
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| 作者单位： | 电子科技大学,自动化工程学院,四川,成都,610054 |
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| 摘 要： | 在数字示波器中,当最高采样率都不能满足系统要求的时候,我们需要对其进行相应倍数的插值。文章介绍了使用XILINX System Generator for DSP工具在MATLAB/Simulink的环境下完成算法的建模,然后生成相应的工程代码,来开发基于FPGA的插值数字滤波器,借助Modelsim工具验证实现结果。大大消除了原先系统工程师和软硬件工程师之间的隔阂,同时也简化了传统的FPGA开发流程。
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| 关 键 词： | 数字示波器 System Generator for DSP 插值滤波器 FPGA |
FPGA Realization of Interpolation FIR Digital Filter based on System Generator |
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| Luo Ting-ting,Wang Hou-jun,Zeng Hao.FPGA Realization of Interpolation FIR Digital Filter based on System Generator[J].Electronics Quality,2009(10):21-23. |
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| Authors: | Luo Ting-ting Wang Hou-jun Zeng Hao |
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| Affiliation: | Luo Ting-ting,Wang Hou-jun,Zeng Hao(School of Automation Engineering,University of Electronic Science and Technology of China,Sichuan Chengdu 610054) |
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| Abstract: | In the digital oscilloscope, when the maximum sampling rate can't meet the system requirements, we need to do the corre-sponding multiples of the interpolation for it.This paper introduces the use of XILINX System Generator for DSP tool in the MATLAB/Simulink environment for the completion of Algorithm modeling, and then generate the corresponding code, to develop FPGA-based digital interpolation filter, using Modelsim tools to verify the achievement of results. Significantly eliminate the original system e... |
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| Keywords: | SystemGeneratorforDSP FPCA |
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