Affiliation: | a Department of Electronic Engineering, Feng-Chia University, Taichung and School of Microelectronic Engineering, Griffith University, Nathan, Brisbane, Queensland Q4111, Australia b School of Microelectronic Engineering, Griffith University, Nathan, Brisbane, Queensland. Q4111, Australia c Department of Electrical and Control Engineering, National Chiao-Tung University, Hsinchu, Taiwan |
Abstract: | In this paper, the equivalent disturbance rejection (EDR) in QFT design methodology is proposed for dealing with sampled-data systems with time-delay. This EDR is mainly to overcome the non-minimum phase zero generated by the first order Pade' approximation of the time-delay factor. Due to plant parameter uncertainty, the analogue controller is to be designed so that the system response lies within permissible bounds. By approximate Z-transform, the analogue controller can be transformed directly into a digital one and then the analogue plant is transformed into the digital plant, with sampling time as a free parameter. By adjusting the sampling time, the uncertain sampled-data system can be stabilized. In comparison with other approaches, our design framework is much more systematic by using only algebraic manipulations and transparent enough to guide the designer to realize the physical controller for the plant with prescribed bounds on its parameters. |