| 低相位噪声微波锁相频率源设计 |
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| 引用本文： | 薛华.低相位噪声微波锁相频率源设计[J].信息技术与信息化,2006(6):105-107. |
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| 作者姓名： | 薛华 |
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| 作者单位： | 滨州学院物理与电子科学系,256603 |
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| 摘 要： | 介绍了一种用单片机控制的微波锁相频率源的设计思想、设计方法以及实验测试结果。在对锁相技术（PLL）研究的基础上，从理论上提出了锁相源对参考晶振的指标要求，分析了单片机对输出信号频谱纯度的影响，总结设计中需要注意的几个问题，并提出相应的解决方案，使锁相频率源的性能指标达到最佳状态。
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| 关 键 词： | 单片机 锁相环 压控振荡器 相位噪声 杂散 |
| 收稿时间： | 2006-05-30 |
| 修稿时间： | 2006年5月30日 |
Design of Low Phase-noise Microwave PLL Frequency Synthesizer |
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| XUE Hua.Design of Low Phase-noise Microwave PLL Frequency Synthesizer[J].Information Technology & Informatization,2006(6):105-107. |
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| Authors: | XUE Hua |
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| Abstract: | A microwave PLL frequency synthesizer controlled by single chip AT89C2051 is designed, and its result of test is also given. Based on the study of PLL, the theoretical requirement for reference frequency and a method to eliminate the jam of single chip are presented. Several problems needing to be noticed in design and the resolving methods are summed up, and the performance indexes of microwave PLL frequency synthesizer come to a high -point. |
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| Keywords: | Single chip Phase locked-loop(PLL) Voltage-controlled oscillator(VCO) Phase noise Spurious |
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