高可靠性SRAM中缩短汉明码EDAC电路的失效分析

缩短汉明码及其改进码字被广泛使用在宇航级高可靠性存储器的差错检测与纠正电路中。作为一种成熟的纠正单个错误编码,其单字节内多位翻转导致缩短汉明码失效的研究却很少。这篇文章分析了单字节多位翻转导致缩短汉明码失效的情况,分析了各种可能的错误输出模式,并从理论上给出了其概率计算公式。采用Matlab软件进行的计算机模拟试验表明,理论结果与试验结果基本相符。这篇文章最后分析了ISSI公司在其抗辐射SRAM设计中采用的一种将较长信息位分成相等两部分,分别采用缩短汉明码进行编译码的方案。分析表明,这种编译码方案可以降低失效状态下输出3 bit翻转的概率。

Failure analysis of Shortened Hamming code EDAC of high reliability SRAM

Shortened Hamming code and its improved codes are widely used in anti-SEU memory error detecting and correct- ing （EDAC） circuits.Ahhough Hamming code is a kind ofmatured code,researches about the multiple upsets induced incorrect outputs of shortened Hamming code in memories are very scarce.This paper analyzes the different incorrect outputs patterns induced by single word multiple upsets （SMU） and attempts to present a theoretical explanation of its probability distribution. Computer imitation is conducted using MATLAB software and the comparison of results from theory and experiment indicates the coincidence of them. Besides,this paper analyzes a scheme by dividing long eodewordsinto two identical parts and encoding and decoding them respectively with shortened Hamming code, which has been adopted by ISSI in its rod-hard SRAM prod- ucts.The analysis shows this scheme can reduce the probability of outputting multiple upsets infailure mode.