| Abstract: | In this paper, we develop a three‐dimensional (3‐D) device simulator, which combines a simplified, decoupled Gummel‐like method equivalent‐circuit model (DM) with levelized incomplete LU (L‐ILU) factorization. These complementary techniques are successfully combined to yield an efficient and robust method for semiconductor‐device simulation. The memory requirements are reduced significantly compared to the conventionally used Newton‐like method. Furthermore, the complex voltage‐controlled current source (VCCS) is simplified as a nonlinear resistor. Hence, the programming and debugging for the nonlinear resistor model is much easier than that for the VCCS model. Further, we create a connection‐table to arrange the scattered non‐zero fill‐ins in sparse matrix to increase the efficiency of L‐ILU factorization. Low memory requirements may pave the way for the widespread application in 3‐D semiconductor‐device simulation. We use the body‐tied silicon‐on‐insulator MOSFET structure to illustrate the capability and the efficiency of the 3‐D DM equivalent‐circuit model with L‐ILU factorization. Copyright © 2007 John Wiley & Sons, Ltd. |
