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龙芯1号处理器结构级功耗评估有效性分析
引用本文:冯子军,肖俊华,胡伟武.龙芯1号处理器结构级功耗评估有效性分析[J].计算机辅助设计与图形学学报,2007,19(9):1190-1195.
作者姓名:冯子军  肖俊华  胡伟武
作者单位:1. 中国科学院计算技术研究所计算机系统结构重点实验室,北京,100080
2. 中国科学院研究生院,北京,100049
基金项目:国家重点基础研究发展计划(973计划) , 国家高技术研究发展计划(863计划)
摘    要:结合龙芯1号处理器实际设计过程,介绍了处理器功耗评估的方法和功耗模型,分别对结构级、电路级功耗评估和实际芯片3种情况进行测试程序仿真.经过量化分析和比较表明:结构级功耗评估具有仿真速度快、评估结果误差和测试程序相关,并且同一测试程序误差能够追随电路级功耗评估等特点,说明了龙芯1号处理器进行结构级功耗评估的有效性.采用该方法可显著提高低功耗处理器结构的设计效率.

关 键 词:功耗评估  功耗模型  有效性  集成电路  处理器设计  龙芯  低功耗处理器  结构级  功耗评估  有效性分析  Design  Microprocessor  Power  Estimation  Level  Architecture  设计效率  测试程序  序相关  误差  评估结果  仿真速度  比较  量化分析  程序仿真  情况
收稿时间:2006-11-27
修稿时间:2006-11-272007-07-03

Validation of Architecture Level Power Estimation for Godson-1 Microprocessor Design
Feng Zijun,Xiao Junhua,Hu Weiwu.Validation of Architecture Level Power Estimation for Godson-1 Microprocessor Design[J].Journal of Computer-Aided Design & Computer Graphics,2007,19(9):1190-1195.
Authors:Feng Zijun  Xiao Junhua  Hu Weiwu
Affiliation:1.Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080;2. Graduate University of the Chinese Academy of Sciences, Beijing 100049
Abstract:Through the development of godson-1 microprocessor design, this paper introduces the methodology of power estimation at architecture level and circuit level, and analyses their power models. We run a lot of benchmarks at architecture level, circuit level and real chip respectively, and the experimental results show that the simulation speed at architectural level is nearly 100 times or more faster than that at circuit level, and power estimation at architectural level has more error than that at circuit level which depend on benchmark, and the power estimation at architectural level can track with power consumption of real chip with different benchmarks. That proves it is valid of godson-1 power model at architectural level, and the architecture level power estimation will be efficient for low-power microprocessor design.
Keywords:power estimation  power model  validation  VLSI  microprocessor design
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