Error-tolerability enhancement via bit inversion and median filtering for single-bit errors in image processing circuits |
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| Authors: | Hsieh Tong-Yu Peng Yi-Han Cheng Kuan-Chih Cheng Tai-Ang |
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| Affiliation: | 1.Department of Electrical Engineering, National Sun Yat-sen University, 70 Lienhai Rd., Kaohsiung, 80424, Taiwan, ROC
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| Abstract: | Microsystem Technologies - Error-tolerance has been proposed as a new method to increase effective yield of a system. The basic idea is that faulty chips might be still acceptable as long as their... |
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