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DC and analog/RF performance optimisation of source pocket dual work function TFET
Authors:Bhagwan Ram Raad  Dheeraj Sharma  Pravin Kondekar  Kaushal Nigam  Sagar Baronia
Affiliation:1. Nanoelectronics and VLSI Lab, PDPM Indian Institute of Information Technology, Design and Manufacturing Jabalpur, Jabalpur, Indiabhagwanramraad@iiitdmj.ac.in;3. Nanoelectronics and VLSI Lab, PDPM Indian Institute of Information Technology, Design and Manufacturing Jabalpur, Jabalpur, India
Abstract:We investigate a systematic study of source pocket tunnel field-effect transistor (SP TFET) with dual work function of single gate material by using uniform and Gaussian doping profile in the drain region for ultra-low power high frequency high speed applications. For this, a n+ doped region is created near the source/channel junction to decrease the depletion width results in improvement of ON-state current. However, the dual work function of the double gate is used for enhancement of the device performance in terms of DC and analog/RF parameters. Further, to improve the high frequency performance of the device, Gaussian doping profile is considered in the drain region with different characteristic lengths which decreases the gate to drain capacitance and leads to drastic improvement in analog/RF figures of merit. Furthermore, the optimisation is performed with different concentrations for uniform and Gaussian drain doping profile and for various sectional length of lower work function of the gate electrode. Finally, the effect of temperature variation on the device performance is demonstrated.
Keywords:Gate material work function  Gaussian doping  characteristics length  gate to drain capacitance  band-to-band tunnelling
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