LMS algorithm for programming an analogue memory cell |
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| Authors: | Jesús de la Cruz-Alejo L Noé Oliva-Moreno |
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| Affiliation: | 1. Tecnológico de Estudios Superiores de Ecatepec, División de Maestría en Ingeniería Mecatrónica , Av. Tecnológico S/N. Esq. Av. Carlos Hank González. Col. Valle de Anáhuac, Ecatepec de Morelos , Estado de México jesus_ch517hotmail.com;3. Escuela Superior de Computo del I.P.N., Departamento de Posgrado , Av. Juan de Dios Batís s/n, Esq. M. Othón de Mendizábal, México City , C.P.07738 |
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| Abstract: | This article presents the optimal performance of a nonvolatile analogue memory cell fabricated in 1.2?µm CMOS process, which is programmed using a LMS (least mean square) algorithm to implement an adaptive FIR filter used to identify an unknown signal. The memory cell is programmed to store and update the weight in the filter as charge in the floating gate of a pMOS transistor (FGMOS). Programming is linear using a pulse density modulation scheme by means of tunnelling and hot injection electrons. The behavior of the memory is included and programming method is developed. The LMS algorithm performed very well, and does not require the signal to be piecewise stationary, and requires no manual operation other than selection of the step-size of the adaptive parameter. |
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| Keywords: | adaptive memory CMOS-transistor filter floating-gate injection LMS-algorithm tunnelling update weight |
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