Subthreshold analysis of nanoscale FinFETs for ultra low power application using high-k materials |
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Authors: | D. Nirmal P. Vijayakumar P. Patrick Chella Samuel Binola K. Jebalin N. Mohankumar |
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Affiliation: | 1. Department of Electronics and Communication Engineering , Karunya University , Coimbatore , Tamilnadu , India nirmal@karunya.edu;3. Department of Electrical and Electronic Engineering , Karpagam College of Engineering , Coimbatore , Tamilnadu , India;4. Department of Electronics and Communication Engineering , Karunya University , Coimbatore , Tamilnadu , India;5. Department of Electronics and Communication Engineering , SKP Engineering College , Tiruvannamalai , Tamilnadu , India |
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Abstract: | Fin Field Effect Transistors (FinFETs) are used for Complementary Metal Oxide Semiconductor applications beyond the 45?nm node of the Semiconductor Industry Association (SIA) roadmap because of their excellent scalability and better immunity to short channel effects. This article examines the impact of high-k dielectrics on FinFETs. The FinFET device performance is analysed for On Current, Off Current, I on/I off ratio, drain induced barrier lowering, electrostatic potential along the channel, electric field along the channel, transconductance, output resistance, intrinsic gain, gate capacitance and transconductance generation factor, by replacing the conventional silicon dioxide gate dielectric material, with various high dielectric constant materials. Nanosize ZrO2 (zirconium-di-oxide) is found out to be the best alternative for SiO2 (silicon-di-oxide). It is also observed that the integration of high-k dielectrics in the devices significantly reduces the short channel effects and leakage current. The suitability of nanoscale FinFETs is observed with the help of an inverter circuit and their gain values are calculated for circuit applications. |
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Keywords: | FinFET dielectric materials carrier transport efficiency system-on-chip (SoC) equivalent oxide thickness (EOT) threshold voltage roll-off |
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