New single-stage low dc bus voltage stress converter for universal line applications |
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Authors: | Hag-Wone Kim Gun-Woo Moon Chong-Eun Kim Myung-Joong Youn Jwan-Youl Cho |
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Affiliation: | 1. Department of Electrical Engineering Korea Advanced Institute of Science and Technology 373-1 Kusong-Dong Yusong-Gu Taejon 305-701 South Korea;2. Digital Appliance Laboratory LG Electronics Co. Ltd 327-23 Kasan-Dong Keumchun-Gu Seoul 153-023 South Korea |
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Abstract: | A new single-stage power factor corrected ac–dc converter for universal line applications is proposed in this paper. This converter has a buck topology as a power factor corrector. The dc bus voltage of the proposed converter is always lower than the peak input voltage at any load condition. Therefore, the problem of high dc bus voltage under the light load condition for the single-stage converter is solved, especially in the case of universal line applications. The design equations are presented for the proposed converter and a design example for a 5V 12A application is presented. The theoretical analysis and experimental results show that the dc bus voltage can be limited within 260V and the line input current harmonics can meet IEC 61000-3-2 Class D requirements at any load conditions for the line input voltages from 90 to 260Vac. |
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Keywords: | All-digital PLL Architecture exploration PCR related measurements |
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