| Abstract: | This paper presents a transceiver digital circuit. The circuit is responsible for the emission of packets to the asynchronous transfer mode (ATM) network as well as for the manipulation of received ATM packets belonging to virtual connections. It has been designed to support data communication services. The circuit, which can be used in terminals or in interworking units and switches, implements basic functions of the lower layers of the ATM protocol reference model. The transmission functionality includes cell buffering, header error control, cell assembling, rate coupling and information insertion. The receiver realizes information extraction, rate decoupling, cell buffering, header error detection and correction, connection identity fields extraction and identification, cell disassembling and classification, and idle cell discarding functions. The circuit has been implemented on applications specific integrated circuit (ASIC) chips. |
