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On feasibility of a multiplier-less phase-shifting scheme for digital phase modulation and its VLSI implementation
Authors:R. Mahapatra  A. S. Dhar  D. Datta
Affiliation:1. Department of Electronics and Electrical Communication Engineering , Indian Institute of Technology , Kharagpur - 721 302, India raja@ece.iitkgp.ernet.in;3. Department of Electronics and Electrical Communication Engineering , Indian Institute of Technology , Kharagpur - 721 302, India
Abstract:In this paper, a multiplier-less phase-shifting scheme for digital phase modulation is proposed and its implemantation for very large-scale integration (VLSI) is examined. The abrupt phase shift of carrier waveform, required after each data transition in digital phase-modulation scheme, is realized by incrementing the frequency of a voltage-controlled oscillator (VCO) for a short duration, immediately following the data transition. The momentary increase in VCO frequency is realized by feeding the VCO with narrow control pulses, derived from the baseband data stream using a simple supporting circuit. This work currently deals with the VLSI design for binary phase-shift keying (BPSK). However, the underlying concept is generic and hence capable of implementing other digital phase-modulation schemes, such as, quadrature PSK (QPSK), quadrature amplitude modulation (QAM) etc, with a programmable control circuit for the VCO. Thus, the proposed multiplier-less phase-shifting scheme can find useful application in broadband wireless networks employing adaptive modulation schemes.
Keywords:BPSK  VCO  VLSI  Transition-initiated phase acceleration (TIPA)  Phase acceleration interval (PAI)  BER
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