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High frequency dividing synchronous oscillator using modified emitter couple logic inverters
Authors:B Chakraborty  R R Pal
Affiliation:1. Department of Physics and Technophysics , Vidyasagar University , Midnapore, 721 102, West Bengal, India radha_raman_pal@yahoo.com;3. Department of Physics and Technophysics , Vidyasagar University , Midnapore, 721 102, West Bengal, India
Abstract:A synchronous oscillator using a high speed low-voltage emitter coupled logic (ECL) inverter has been reported. Using the positive feedback the locking range increases, compared to the oscillator without any positive feedback. A maximum improvement (increase) of percentage locking range of around 105% was obtained from circuit simulation as well as from practical circuit, using discrete components. Because the locking range is maximum at double the output frequency of the oscillator, this oscillator can be used as a high frequency divider circuit. The circuit requires a supply voltage of 2.1 V.
Keywords:synchronous oscillation (SO)  voltage controlled oscillator (VCO)  current controlled oscillator (CCO)  ring oscillator  emitter coupled logic (ECL)
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