| 用LabVIEW FPGA模块实现不同时钟域的数据连续传输 |
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| 引用本文： | 崔佩佩,何强,韩壮志,尚朝轩. 用LabVIEW FPGA模块实现不同时钟域的数据连续传输[J]. 现代电子技术, 2011, 34(17): 149-152 |
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| 作者姓名： | 崔佩佩 何强 韩壮志 尚朝轩 |
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| 作者单位： | 军械工程学院光学与电子工程系,河北石家庄,050003 |
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| 摘 要： | 为了解决基于LabVIFW FPGA模块的DMA FIFO深度设定不当带来的数据不连续问题，结合LabVIEW FPGA的编程特点和DMA FIFO的工作原理，提出了一种设定FIFO深度的方法。对FIFO不同深度的实验表明，采用该方法设定的FIFO深度能够比较好地满足系统对数据连续传输的要求。研究结果对深入展开研究和工程设计具有一定的指导意义。
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| 关 键 词： | LabVIEW FPGA模块 FIFO 数据连续传输 时钟域 |
LabVIEW FPGA-Based Data Continuous Transmission Between Two Clock Domains |
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| CUI Pei-pei,HE Qiang,HAN Zhuang-zhi,SHANG Chao-xuan. LabVIEW FPGA-Based Data Continuous Transmission Between Two Clock Domains[J]. Modern Electronic Technique, 2011, 34(17): 149-152 |
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| Authors: | CUI Pei-pei HE Qiang HAN Zhuang-zhi SHANG Chao-xuan |
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| Affiliation: | CUI Pei-pei,HE Qiang,HAN Zhuang-zhi,SHANG Chao-xuan(Department of Optics and Electronics Engineering,Ordnance Engineering College,Hebei shijiazhuang 050003,China) |
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| Abstract: | In order to solve the problem of data transmission discontinuity caused by the improperly depth setting of DMA FIFO based on LabVIEW FPGA,a method of setting the depth of FIFO is presented in combination with the characteristic of LabVIEW FPGA and the working principle of DMA FIFO.The experiment of FIFO with different depth indicates that the method can satisfy the requirement of the continuity of data transmission.The result has a certain instruction meaning for further research and engineering design. |
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| Keywords: | LabVIEW FPGA FIFO continuous data transmission clock domain |
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